DR-002 Decoder Counter for Incremental EncoderSize : 3.5" x 3"The DR-002 decoder is a low cost solution for decoding and counting quadrature incremental encoder signals for interface to a microprocessor. The DR-002 improves system performance in digital data input systems and closed loop motion control systems by shifting time intensive quadrature decoder functions to hardware. Typical uses would include motor shaft rotary incremental encoders, linear encoders and digital potentiometers. The heart of the system is the HP HCTL-2016 Quadrature Decoder/Counter IC. The IC provides a 16 bit counter output function that can be accessed via an 8 bit parallel data bus. Complete interfacing to a microprocessor or microcontroller requires 3 output bits for control functions and 8 input bits for reading counter data. Interfacing the board to the microprocessor and to the encoder is easily accomplished via the screw terminals provided. Encoder input signals are buffered and the decoder is clocked by an on board crystal clock oscillator. The digital noise filter section of the decoder IC rejects both common mode and differential noise on the incoming quadrature signals. This improves data integrity by avoiding noise generated false counts. The quadrature decoder decodes the incoming filtered signals into count information. The incoming count is multiplied by a factor of four. Encoder direction information is based on the sequence of incoming signals from Ch. A and Ch. B.
The position data latch is a 16 bit latch which captures the position counter output data on each rising clock edge except when its inputs are disabled by the inhibit logic section during two byte read operations. Data is output on an 8 bit data bus when the user takes the OE bit low. Sixteen bit resolution is accomplished by sending the data in two 8 bit bytes called the high and low bytes. The SEL bit is low to read the high byte and set high to read the low byte.
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